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Rathlin

Project 'Rathlin' aims to conduct research on developing programmable embedded platforms for remote and compute-intensive image processing applications.

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Rapid developments in image acquisition/interpretation and intelligent algorithms have not been matched by sound software engineering principles, to generate efficient solutions for time, memory and power efficient hardware. Typically sensors comprise simple processors which communicate to some central resource for further processing but in medical and security applications, there is a need for more intelligent image acquisition, multi-view video processing (merging many views into a more useful, higher-level representation) and more context-aware acquisition devices which are aware of the existence of other cameras that can contribute to the creation of the full scene. This suggests the need for advanced, image processing platforms which offer high levels of performance at low power but which can also be easily programmed. 

In Rathlin a collaboration is made between Queen’s University Belfast (QUB) and Heriot-Watt University (HWU), to research into a novel FPGA-based processor for image processing and a methodology to allow programming of the resulting architecture; the architecture will unleash the potential of state-of-the-art field programmable gate arrays (FPGAs) but will be evolved in close synergy with a suitable software representation for the application and a programming environment to allow a high performance solution to be realised using the proposed architecture. Main objectives of this project are:

  • Design and development of the FPGA based IPPro system.
  • Development of a domain specific programming language targeting IPPro architecture.
  • Realisation of prototypical 2D and 3D image processing algorithms.

Funding: The project is funded by the Engineering and Physical Science Research Council (EPSRC) under the EP/K009931/1 and EP/K009583/1 grant, undertaken in collaboration with Heriot-Watt University and Queen's University Belfast; it also involves Andor Technology Ltd, Analytics Engines Ltd., Thales Optronics Ltd and Xilinx.

Updates and Events

10/05/2016 Deepayan Bhowmik receives Digital Catapult EPSRC fellowship to work on digital rights management. [Link]

10/05/2016 Rob Stewart presents RIPL and transformations at UKMAC. [Link]

13/03/2016 Conference paper on IPPro compiler and hardware optimisation with HOG is available online now. [DOI]

12/03/2016 Project papers on image processing DSLs [Link] and DSL concepts [Link

12/03/2016 Rathlin project led international workshop on real world DSLs. [Link]